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maxmax_66
modified 6 years ago

Binary Shift Multiplier

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This is a 3×3 binary shift multiplier. The multiplicand input is represented by the three logic sources on the right. The MSB is the leftmost input, the LSB the rightmost. The multiplier must be shifted into the 3 bit shift register located on the bottom right. Use the logic source at the middle left to select bits to be input serially from left to right into the register, and clock each selection into the register using the bottom leftmost logic source. This is achieved by setting the logic source HIGH and then LOW between each multiplier input. Remember that the MSB is the leftmost displayed bit, the LSB the rightmost. Now make sure the multiplier input is set low, and again use the bottom left logic source to clock the multiplier through the register. It requires three clocks to shift the multiplier through the register. After three clocks, the product will be displayed. To reset for now set all inputs low and clock all bits out of the shift register. The algorithm of multiplication is quite straightforward. The LSB of the multiplier is multiplied with the multiplicand using the three AND gates and shifted towards the right. We then multiply the next bit and add to the shifted result using the 3 bit adder at the top right. Again multiply add then shift, and in this way all partial then shifted products are added to achieve the final product. Don't rush the clocking process and remember once you have your chosen multiplier, it requires three clocks for the desired product Enjoy. https://youtu.be/QW0XNZPyWUk
published 6 years ago
hurz
6 years ago
I have tested some combis, and looks fine 6 x 7 = 42 and two more smaller but i dont go and do all 😀 How much more clock cycles a 4*4 multiplier would need linear or quadratic? And the number of needed gates, suppose the clocks are proportional linear to number of bits, how is the number of gates involved related, quadratic? Multiplier are the chip size eater when they are fast, if they are small they are as slow as much '1' you have in your parameter A or B to get C So the sum of 'ones' in B is for slow multiplier the number of cycles you need to make a simple ADD from A to multiply. I would like to see some basic multiplier here on EC but .... Thanks @maxmax_66
maxmax_66
6 years ago
@hurz. Thank you. A 4×4 multiplier of this sort would require an additional adder and two additional flip flops, one for the shift register and one for the accumulator and would require 4 clock cycles for a final product. I agree, this method is slow compared to combinational multipliers I've made using just adders, but requires less overall space. A side by side comparison of basic multipliers would be insightful. I'll work on that. Thank you again for your attention and input, it is much appreciated.
maxmax_66
6 years ago
I should clarify. The space saving aspect is only associated with the simulation owing to the integrated flip flops. If I built the flip flops from basic gates, the space used would exceed the space needed for a 3×3 combinational multiplier and would certainly exceed the available real estate.
kiani
6 years ago
Nice chioce of color max.
maxmax_66
6 years ago
For comparison http://everycircuit.com/circuit/4629225503981568

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