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This "analog ramp analog-to-digital converter" (ADC) is the discrete-logic implementation of the homonym ADC sometimes found inside microcontrollers and DSPs.
Change the voltage at the input, at the far left, then run the simulation; once started, press the push-button at the center-down of the schematic; this will start the conversion.
The voltage is proportional to the number of clock pulses that "passed" during the conversion phase (at the output of the far right logic gate).
With the last update, the voltage can be read on the 7-segm display.
ABOUT THIS CIRCUIT
The main benefits are:
- easy and cost-effective construction, at the silicon level
- does not require a DAC: hence, it's intrinsically monotonic, does not generate missing code and the resolution is set mainly by the comparator's offset voltage.
The downsides are:
- analog component design can be difficult, once developed onto the silicon, since the team is specialized on digital circuitry (circuits like this are usually implemented on microcontrollers (aka, digital) ICs)
- the various analog parameters must be kept tightly under control, otherwise leakage currents and offset voltages will cause wrong readings.
- this is a somewhat temperature-dependent design, so the operating temperature range is constrained.
- speed is low, since in the worst case scenario the capacitors must charge up to the full positive rail. If the ADC is n-bits, then the output clock pulses used to determine the input voltage will be 2ⁿ.
For these reasons, it's one of the least used ADC organizations used inside modern ICs, compared to other tecnologies.
Note: this implementation does not include the obligatory sample-and-hold circuitry at the input stage. Without it, if the input changes during a measurement, the result will be wrong.
P.S.: Thanks to PrathikP for the suggestion of the output value visualization on the 7-segm display!
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