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This "digital ramp analog-to-digital converter" (ADC) is the discrete-logic implementation of the homonym ADC sometimes found inside microcontrollers and DSPs.
Change the voltage at the input, at the far left, and run the simulation again.
The output ADC word would be read from the bits of the DAC, once the comparator stops the measurement.
ABOUT THIS CIRCUIT
The main benefits are:
- easy and cost-effective construction, at the silicon level
- only one analog comparator (the one at the bottom is used only in this simulation in order to merge the two DAC outputs, but is not needed in the actual implementation).
The downsides are:
- resolution and accuracy depend mainly on the DAC, which can be non-monotonic or generate missing-codes
- speed is low, since in the worst case scenario (i.e. measured voltage = max positive range) it takes 2ⁿ clock cycles for a single conversion, where n is the number of bits of the DAC
For these reasons, it's one of the least used ADC organizations used inside modern ICs, compared to other tecnologies.
Note: this implementation does not include the obligatory sample-and-hold circuitry at the input stage. Without it, if the input changes during a measurement, the result will be wrong.
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