Quick circuit to showcase the mechanisms behind the DRAM 1T1C design.
The two position switch is there to change between "Writing" (Left Position) and "Reading" (Right Position).
In the Writing Position:
The capacitors which store the information are set to the Write Data value when their corresponding transistors are "enabled".
In the Reading Position:
You can select which capacitors should control the read line.
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Inputs
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Top Left: Write Data
Value which you want to store in the DRAM Cell
Gate Inputs: Bit Selects
In the writing position, this selects which transistor/capacitor should be assigned a voltage.
In the Reading Position, this selects which capacitor voltage should control the read bus.
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OUTPUTS
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LED Circuit:
Simple circuit to show when a 0 or 1 is detected.
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Design Choices
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A 10Mohm Resistor is placed to act as a pull down resistor and allow the solver to actually find a solution when the read/write switch is flipped.
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Questions to Explore
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What happens as you keep reading from the bits? Which components are controlling the rate of this happening? What is impacted by making the capacitors in the 1T1C cells larger and smaller?
What happens if you select 2 bits to drive the read line at the same time? What type of circuit(s) could be used to prevent this from ever happening?
The two-position switch should be able to be electrically controlled. What type of circuits would allow you to do this?
Why is there a time-constant seen during charging if there are no resistors explicitly in the writing circuit? What could be done to change this?
