Double-Phase Buck Converter

This circuit has 2 pass elements, what's that unconnected nMOS for?

The current method has high ripple above 200mV when output is below 5V or so. That's in progress work to tackle that. Any suggestions?

There are a lot of suggestions I'd like to give, but just to avoid a wall of text I'll give them one by one and see how the circuit progresses. 1. Try to keep all logic, signal processing, opamps, comparators etc. running at low voltages (5V, 3.3V or 1.8V) and just the MOSFET gate driver at higher ones, if needed. These voltages are pretty standard and this will help you when you'll want to build this circuit and you'll conserve power. 100V or -100V is a bit too much for most op-amps.

2. Be very careful when using nMOSFETS as pass elements in this circuit. What happens when your load needs a lot of current?

3. Search the internet for a few datasheets of MOS power transistors and see if you can make your pass elements look and behave more like that. For example, I've got a transistor that has an on resistance of 0.005 Ohms when vgs = 10V. Also, take a look at what an IGBT is and tell me why are these things useful?

If you have questions, don't hesitate to ask. :)

I will. I have modified such that the opamps except the one driving the nmos use low voltages (3.3V). Increased the NMOS size so that it has less resistance. Could not get width/length of Power Fets online...

I do know what IGBTs are but i dont think attaching a cap to BJT gate will cut it in EC. Haha...

So far so good. It's ok, you don't need the exact W/L ratios, just W>>L. The whole ideea behind power transistors is that they must be as close as possible to a metal switch (very high resistance when off and a very low one when on). If they don't satisfy that requirement, they will consume a significant amount of power and, depending on how much power, their life will shorten or just fail instantly.

Did you find out why using nMOSFETS as pass elements is a bit of a problem here?

I am assuming because of the nfets pass 0 better and pfets pass 1 better thing?

That's kinda close, even if it's into digital. :) So, you want your pass elements to be either on (in the triode / linear region) or off, never in a saturated state (is that what you call it?). As in you would like to generate a square wave (high 100V, low 0V) with a duty factor (let's call this one D) of, let's say 20% for an output of 20V (output voltage will be D*Vin). With a nfet you will need to bias it's gate over 100V + Vgs to get the high state of your square wave and with a voltage that's negative when you want to open the switch (to turn it off) because of the inductor and the diode (you should check this). And both of these voltages are not available, you'll need additional circuits to get them. But with a pmos things change: to turn it off you need 100V and to turn it fully on you can use 0V (or anything below 80V). Which is perfect, you have 100 and 0V but not 110V and -10V. P.S. With 100V and 0V the nmos can't be fully open or fully closed so it will probably burn very soon.

I see you're getting a lot of errors. Make the load 10 Ohms.

The next step will be to accurately generate the square wave with a programmable duty factor (right now, you're sensing the output voltage and, because of the LC filter's huge response time, you're having trouble with a nasty ripple - when the output is ok you turn the pass element off but it's too late). How will you tackle this?

I can make the ripple smaller with a smaller inductor and larger cap. The best i can think of is to add in a differentiator to the circuit. But it's going to get to big and probably too much to simulate. I scaled the voltages down as it seems yo male simulation easier. Any ideas?

If you're thinking about adding the differentiator to the output, you'll be in the same spot because you'll still be delayed by the LC filter. Also, you already have the derivative of that voltage somewhere in the circuit (where?). You should sense that and generate the input to the filter accordingly. Btw, can you tell me how this circuit works? I feel that it's not working as intended. Why 4 op-amps? What does each one do?

The right most opamp generates an error signal, the middle opamp is a integrator which changes the PWM in reaponse to the error signal. The left most 2 opamps are just out-of-phase PWM generators, 2 pmos for each phase to increase current output.

I am actually thinking of adding a differentiator to the error signal and then multiplying it with the integrator to get a better controller but i think EC wont be able to simulate and there isnt much space anyways.

The integrator isn't working as intended. Because of the small capacitor (1pF) it's acting as a comparator and so are the PWM generators. A PWM generator requires a constant voltage on one input and a triangle wave on the other (right now you're feeding a low duty square wave and a triangle wave which makes them transparent - you might as well be feeding the output of the integrator to the pMOS elements, it will be the same thing).

A differentiator and an integrator will cancel each other out, remember what you're trying to do: generate a square wave at the input of the LC filter that has the average voltage of what you want at the output.

God, I wish I had a pen and paper, things are hard to explain in words.

Btw, the design works quite well when you fix the integrator.

Fix that and I'll show you how to generate the correct square wave input (or I'll give you more hints if you like)

Very good work. Now, can you tell me why the output voltage isn't 5V even though your reference is 5V?

Interessting circuit and a good example for an offset problem caused by an integrator ;-) @ZyanWu keep up your good support!

@hurz: Hey, I'll do my best. :D

You don't need to (but you're going in the right direction) add an extra RC lowpass filter to the integrator's output, the integrator itself is a lowpass filter (see Miller effect). The last thing you need to do, to have a working circuit, is to fix the PWM generators.

Your integrator can output voltages between -3.3V and 3.3V but your triangle wave is between -3.3V and 0, should be 3.3 instead of 0. You might also want to add a resistor in parallel with the cap from the integrator (anywhere between 5 to 100 times the input resistor is fine) and restore the op amp's original 100k gain. That's the practical way to set the op amp's gain.

After that do a run with one of the PWM generators swithed off and compare it to where they're both working. Remember to connect the switches near the fets to 12V, not to ground, to turn a pMOS off.

What you'll notice is that, in a steady state, two generators working with different phases will double the frequency of the PWM signal, three will triple the frequency and so on. So, you can get the same effect with only one PWM generator which has the frequency of the triangle wave doubled.