With the increase in workspace, I decided to review my past circuits to see if I could improve the simulation experience.
This is a hexadecimal to decimal and/or a binary to BCD (Binary Coded Decimal) converter using the Double-Dabble algorithm. As an example, it converts "3D" Hex (0011 1101 binary) to "61" Dec (0110 0001 BCD). See the first versions here:
4 bit: https://everycircuit.com/circuit/6548980953251840.
8 bit: https://everycircuit.com/circuit/6747473873469440.
They work, but I want to try and improve them.
My objectives are:
1) Remove D-Type flip-flops: They seemed to cause much of the slow loading and lag. I replaced them with counters/registers, which seemed to help a lot.
2) Increase speed: This circuit is about 3 times faster than the original (and that's still kinda slow).
3) Reduce component numbers: The binary serial stream circuit is more efficient. I also saved on the reset logic by using the RESET pin on the counters.
Still, this circuit is not running as fast as I would like. Does anyone know why? The whole circuit boils down to just a very large Moore State Machine with 10 state variables (counter outputs). The boolean Next State Equations are created with the logic gates. Shouldn't this be very fast for a circuit engine to solve?
Can anyone help me with my objectives?
