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This is a circuit provided from Stack Exchange related to a "Differential Amplifier" provided in Hall's Advanced Signal Integrity for High Speed Digital Designs.
Edit: I found that this FET configuration comes from the rising popularity of LVDS replacing ECL/PECL (Lee Ritchey). Shown here is the H-Tree Switch of Mosfets (the 2 PMOS, and 2 NMOS) from an LVDS Driver. I believe the 5th NMOS is acting as the current source in this scenario, but I could be wrong. The typical rise and fall times for LVDS are around 400pSec, but the simulation here seems to breakdown or FET complexities arrise or my Sources are not proper, all of whcih don't convey the concept I am trying to show here, that is of more value.
DISCLAIMER: Voltages are not accurate, this is a WIP. Mainly using to show the cross detecting effect.
WARNING: Do not edit the the period to be too quick or else you will break the scope and it will be stuck in 1uS. Ask me how I know...
The purpose of this drawing is to show that this is not infact a "Differential Amplifier" as many would call it. It is actually more like a Current Switch or Crossing Detector (Lee Ritchey Right The First Time Chapter 31 Differential Signaling, honestly, read the entire chapter). Here in this circuit I am showing the differential pair as the green and orange waveforms. The Blue waveform is the digital data that is transmitted due to each crossing that is detected.
I highly encourage you to vary the square wave generators delay. Watch how the crossing region preserves the integrity of the signal as long as the rise and fall times are within the linear 10-90% region. Also round out your edges (which occurs with higher speed ICs) and see how it is more important now to preserve the rise and fall times within the 20-80% region.
This is why length tuning differential pairs is important. Each of the voltages from the square wave generators (ypur differential pair) will travel down the transmission line as an electromagnetic wave. Your GOAL is to get the crossing region as close to middle as possible. Time is the most important, they need to arrive at the same time (delay simulates that aspect of one wave arriving too late or early). Length is STILL important in order to minimize Jitter, but it is not as integral as some people make it out to be (depending on your design and digital speeds).
I'd also encourage you to watch Altium Rick Hartley What Your Differential Pairs Wish You Knew.
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