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Look at the top left Pmos circuit where the load LED is on the Source arrow side.
The Pmos VTO setting is at the default -400mV
That means the Pmos LED action should occur at the 12v supply V minus that VTO drop of 0.4v ie at 11.6v above zero.
A Pmos is normally on, with the bar fully out and the LED lit until the gate volts rise to or above that 11.6v threshold point above zero....which it is here shown. (Pmos VTO, otherwise called Vth is the same place occurance, but referenced as a drop from the supply to this gate point, rather than the height above zero v which we state for Nmos...hence the minus sign reminder in the settings).
NOW..... turn the gate voltage down on that top left circuit until the LED just starts to become visible......vaguely down near 4v above zero here.
NOW..... Look at the top right circuit and turn that gate voltage down from the similar 11.6v above zero shown setting until you see it's LED just become visible.....vaguely down near 7v above zero.
That is better than the top left circuit, the LED current started to flow sooner here on the top right as the gate voltage drops below 11.6v above zero now that the load LED is on the Drain side instead of on the Source side.
NOW..... Look at the bottom circuit which has the load LED on the Drain side and the Pmos settings adjusted as maximised for flow. I have left the VTO setting at 0.4mV just like the other two circuits above.
Turn the gate voltage carefully down from 11.6v to 11.5v and see how the LED current flows fully.
This bottom circuit setup is closest to a real Pmos gate operation.
I would advise using the same settings as seen in this bottom Pmos for general full switching....but with the VTO changed to -3v which is approximately that of a standard P-mosfet.
Advanced users may wish to alter the settings to set Rds or to use for amplifier instead of the switching mode described above, (or to venture in to power mosfet increased gate capacitance with the need then to increase gate current to reduce the increased discharge time perhaps with a driver....but let's not get ahead of ourselves for this basic article).
You may want to play around with the VTO.... eg make it -9v with the gate cutoff point at 3v above zero to simulate a LL Pmos gate action, rather than have those values the other way round where the VTO needs to be about 3v for a standard non LL Pmos, thus requiring you to apply 9v or more above zero at the gate to shut it off at this 12v supply....but just remember to not use a double negative in your calculations....The minus sign in the Pmos settings is really only a reminder that you are dropping down from the supply v
Lastly, here is a quick test....
Suppose you have a supply of 40v and you have set your standard Pmos with a VTO of -3v in order to simulate a real one (and you have maximised the other settings as in the bottom circuit here !).
What minimum gate voltage above zero needs to be applied to turn the gate off, thus with no bar?
Check your result by altering the bottom circuit shown above.
(You did remember to alter the VTO and the load resistor didn't you?)
Pull up resistor not needed in the above article, but you may need to consider that, eg if you use the supply to feed the gate, unlike these shown circuits.
See here for N-Mosfet setup http://everycircuit.com/circuit/5051798533701632
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