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YuHan
modified 12 years ago

Challenge--8-bit SRAM

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04:29:03
This is a 8-bit SRAM project and i had spent two hours on it. Function: Its has six signals(r/w Datain A1 A2 A3 Dataout(LED showed)) and each signal has three modes--high/pulse/low, except r/w(because it only in heigh or low that enable the ram store data or data out), u can store data or read data by turning switch on/off. #Conditions(or u could seen my "SRAM cell" project) : if r/w=0→read, else write;A1 A2 A3 are inputs of 3-bit to 8-bit decoder which is used to select ram cell(NOR →left to right: D0......D7). #Layout: left→vsource and five switches including r/w , Datain , A1, A2 and A3. Middle→memory cells (cross coupling NOR --upper row show memory state and in there you will seen two rows numbers, and you need the second one after you run it) and control logic gates. Right→a Decoder, another four switches uesd to write data and choose ram cells by hands. #Operation: turning A1A2A3 switches to voltage mode(connected with three switches on the right),according to r/w u can store or read data. Be careful, when you store data, you should make r/w=0 before you turning address switches. Because if r/w=1, some memory cells will change while you turning address switches. If u want to read data in cycle just turning left address switches to pulse mode, and the LED will show the result from D7 to D0 again and again! #Original state of rams maybe shows 2.5 or 2.49 voltage means high-impedance state. So you need write it and this is why SRAM will lose data after power off! #You can delete OR gates and add other 7 LEDs to each column(one column is a ram cell which starts at the third column of layout), then connected them to the AND gates(the seventh row). An example like this: After running it, make r/w=1, Datain=1, address switches in pulse mode, then after 8 clock, make r/w=0, you will seen the LED lights up from right to left in cycle. Ok, just try it and do it! Enjoy yourself! Understand not, please tell me!
published 12 years ago

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