|
The RC circuit always looks quite innocent but some of the important features lurking in its guts can be easily shown.
Without changing any parameter, let the simulation run for few minutes and observe how the DC component of the input signal (0.5 V) is being (slowly) removed from the output signal.
This is the DC "blocking effect" of the cap.
As soon as the output signal is swinging between 0.5 V and -0.5 V, note how the output signal's shape perfectly reproduces the input signal's shape with basically "no distortion".
Why is that?
Because the time constant of the RC circuit is 10 ms while the period of the input pulses is 100 us, only.
This means that the voltage drop across the capacitor (output signal) can only be "rigidly shifted" up and down by the input signal, because it has not enough time to change.
So, let us now reduce the time constant by slowly changing the value of the resistor.
As soon as the time constant will be comparable to (or smaller than) the input
signal's period, we will observe the familiar capacitor charging and discharging curves.
Thus, the output signal will no longer reproduce the input signal as we observed before. Instead, the output signal will result "highly distorted" with respect to the input.
This is a time-domain view of the distortion phenomenon. In the frequency-domain we would say that the cutoff frequency of the high pass filter increases when we decrease the value of the resistance, thus allowing less and less sinusoidal components of the input wave through the capacitor (output distortion).
|
