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Now with switches in order to test the State Table for J-K
Defaults, set is off, reset is off. State is stable at NO CHANGE.
Left switches represent J (top) K (lowerleft)
Very bottom switch (between 5v Vcc and the NOT Gate) represents the clock high and low. High means you can change the stat, and of course, low means you can't or the clock will force the next specified state when it IS turned on.
Truth Table!
where J=S (set)
and K=R (reset)
Q = What the output of the LED is now!
Q(+) = NEXT value for Q.
Char Equation:
(Set-reset latch)(most basic form)
Where S-R => Q(+)= S + R'Q
and S=R, and R=K
--> J-K => Q(+)= JQ' + K'Q <--
Example: when Q(+) = (0)(1)' + (0)'(1)
= (0)(0) + (1)(1)
Q(+)= 1
J_K_Q_|_Q(+) Maths!
0 0 0 | 0 (0)(0)' + (0)'(0) = 0
0 0 1 | 1 (0)(1)' + (0)'(1) = 1
0 1 0 | 0 (0)(0)' + (1)'(0) = 0
0 1 1 | 0 (0)(1)' + (1)'(1) = 0
1 0 0 | 1 (1)(0)' + (0)'(0) = 1
1 0 1 | 1 (1)(1)' + (0)'(1) = 1
1 1 0 | 1 (1)(0)' + (1)'(0) = 1
1 1 1 | 0 (1)(1)' + (1)'(1) = 0
Try flidding with the switches and take notice that when the LED is on, Q is 1, (output = Q) and vise versa for when the LED is off.
Note: For those who haven't taken
Boolean Algebra (Digital Circuits or
Discrete Math):
+ is OR
' is NOT (A' is NOT A), and
JQ' means "J AND NOT Q."
Ex -> true and not false
is the same as saying
true and true...
or just true.
true = 1, false = 0.
Q(+)= JQ' + K'Q translates to NEXT Q EQUALS (J AND NOT Q) OR (NOT K AND Q).
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