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I've been struggling to design a hi-fi voltage controlled amplifier, or at least attenuator. Every working design I came up with introduced distortion because the control transistor responded to the signal as well as the control input. (Yes, only one control transistor. It's possible I just haven't learned enough tricks to design it properly.)
Then I realised I could convert the signal to PWM, control the height of the PWM pulses, and integrate back to AC. Simple! But there's a problem. :)
On the left side is the PWM encoder, along the bottom is the decoder in the form of a buffer, decoupler, and two Sallen-Key filters, and the rest is the fun part.
"The fun part" is a simple RTL-like inverter powered by the control voltage. The great thing about an RTL inverter like this is that it doesn't care if the input is a higher or lower voltage than its supply. Just give it enough current, and it'll pull its output low. By powering the inverter from the control voltage, it becomes a voltage controlled level shifter.
The "logic 1" level, the tops of the pulses coming out, are thus the same as the control voltage. When filtered, the overall scale of the output will depend on the control voltage. The job seems done.
An op-amp buffers the control voltage to supply a stable voltage with enough current, but "enough current" is part of the problem. That 50Ω resistor on the collector passes 5 to 10 times as much current (from a 10V input) as most op-amps can ouput! Why is it so low?
What I didn't realise when I thought of all this was that PWM requires __speed__! The speed at which that output changes determines the quality of the whole circuit. EveryCircuit transistors are quite fast but not the fastest. They seem to have an internal capacitance of about 5pF which isn't adjustable, so of course it takes lots of current to charge that capacitance and swing the output.
So, it'll take a hefty op-amp to buffer the control voltage. Not an actual power op-amp, maybe a line driver or something. Or maybe a small power op-amp.
The comparator encoding the PWM doesn't have to supply an unusual amount of current, but it does need a very fast slew rate, 10ns or less! I've got it swinging up to +5V, perhaps that could be reduced for better performance.
The op-amp buffering the PWM might not need such a fast slew rate. If it's slower, that might act as another filtering stage. On the other hand, that might introduce distortion. I don't know and don't want to investigate now.
Anyway, one of the nicer features of the whole circuit is that it can be inverting or not simply by swapping the inputs to the comparator.
Amplification per control voltage:
Vct dB
9.9 -30
9 -7.5
7 2.3
5 6.2
3 9.1
1 10.7
0.1 11.6
It's not a logarithmic response. that could be rectified by making the control buffer a logarithmic amplifier, which need not be complex as it's out of the signal path.
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