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Serial Digital to Analog converter
In this example, the output converts a "pseudo-random" bitstream. This is to better show you the behaviour of each stage, seen at the scope, of what happens inside the DAC.
You can substitute it with a logical source, in order to see for yourself how the output behaves.
ON THIS CIRCUIT:
This "Serial" Digital to Analog converter structure enables the conversion of a digital register, bit-by-bit starting from the LSB, by feeding it as a digital train (usually achieved with a shift register) into the first stage, where its value (logical 0 or 1) is used to charge a capacitor.
This cap is then discharged into a second one, in a sort of "master-slave" behaviour, but halving the output voltage at each step.
By starting with the LSB, it implicitally becomes the "least important one", since the output value follows this formula:
V_out@step(i) = 0.5 * [ V_out@step(i-1) + V_applied@step(i) ]
You can see that, since each time the input value is halved, at the end of the conversion the first value assume its value divided by 2ⁿ.
Advantages:
- low cost: very conservative at the silicon area level
- assuming good tolerances on capacitors and other components, a high number of bits can be achieved (up to 16~20)
Disadvantages:
- relatively slow: for each bit converted, the input has to charge/discharge the fist cap, then connect the two caps together. Furthermore, at the end of the conversion of all bits, all the capacitors have to be discharged in order to start again.
- the number of analog components involved requires tight tolerances, otherwise the output is skewed and offset/gain errors can occur.
- each transistor commutation can cause glitches that can then create output spikes and offsets.
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