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Analysis of the Binary to 7-Segment Decoder:
Hex values outputted
0123456789AbCdEF
the 4 to 7 "Decoder" is affected directly by the truth table.
Decimal (h) is always on, so just hooked directly to 5-volt V cc.
Truth Table
DCBA Hex Char a b c d e f g
0000 < 0 1 1 1 1 1 1 1
0001 1 0 1 1 0 0 0 0
0010 < 2 1 1 0 0 1 1 1
0011 < 3 1 1 1 1 0 0 1
0100 4 0 1 1 0 0 1 0
0101 < 5 1 0 1 1 0 1 1
0110 < 6 1 0 1 1 1 1 1
0111 < 7 1 1 1 0 0 0 0
1000 < 8 1 1 1 1 1 1 1
1001 < 9 1 1 1 0 0 1 1
1010 < A 1 1 1 1 1 0 1
1011 b 0 0 1 1 1 1 1
1100 < C 1 0 0 1 1 1 0
1101 d 0 1 1 1 1 0 1
1110 < E 1 0 0 1 1 1 1
1111 < F 1 0 0 0 1 1 1
Normally, if you were doing the AND-OR implementation of this circuit, you would make 4-Literal K-Maps for each of the seven functions, abcdefg, and then wind up with a minimum sum of products. each of the abcdefg outupts on the "decoder" corresponds to an OR gate output from another 4-8 decoder inside this apparent 4-7.
The corresponding OR gate is fed with the min-terms for each function (abcdefg). Example, the OR gate for a is fed by the min-terms m=0,2,3,5,6,7,8,9,10,11,12,13,14,15)
Plugged into a K-map for the a-function alone:
BA
DC 00 01 11 10
00 1 1 1
01 1 1 1
11 1 1 1 1
10 1 1 1 1
The resulting sum-of-products Boolean expression is:
D+ B + CA + C'BA = a
Meaning that "a" ond the decoder is a 4 input OR gate's output.
If you were to impliment a as NAND-NAND (Cheaper to build) you would need to compliment D & B on your 2-Level circuit output.
Additionally, this is an Active High decoder.
I wish Every-circuit had multiplexers. It would make for some interesting combinations, and additionally
MOAR DECODERS PLZ!!!
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