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this is a digital logic made using a couple of 74HC02 to manage power latch on different scenarios:
1 - at startup: the leftmost switch power on the device. Through the monostable on the bottom, S pin in set HIGH on the latch turning on the n-MOS that let the current flow on the MCU (simulated by a 75mW lamp).
2 - after MCU do his job: a GPIO will be connected instead of the upper most switch. The MCU will set it, through the monostable on the top, R pin is set HIGH on the latch turning off the n-MOS.
3 - on external event while the device is turned on: through the push button can be triggered the S pin on the latch.
the only point I've to figure out is how to connect GPIO of the MCU to the latch circuit. What I've noticed is that, even if there is no current flowing through the MCU, GPIOs have a voltage level different from 0, so if I connect GPIO directly to the R pin of the latch, after the MCU set pin high, MCU will shut down as the mos gate is set to gnd, as the GPIO will continue to be polarized R pin will never go to gnd and R pin will stay high. In this scenario even if I try to set the S pin high the latch is in a wrong input condition and the mos will never turn on.
To solve the problem I've used two more NOR gates to configure a monostable in order to restore R pin to LOW after a while.
In any cases the GPIO connected to upper most switch will create a path from Vcc to Gnd through the MCU and the 25k resistance. To avoid this would be helpfull a optocoupler to separate MCU io from the control circuit
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