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RS Flip Flop

@Guich
10 years ago
https://everycircuit.com/circuit/6687150077640704
That's a typical RS FF realised with two NOR-Gates. When the simulation starts there's a not defined state. Both outputs give some weird outputs. When both Inputs are set (forbidden state) there's also a not defined state. When you set only one Input the FF saves the Input until the other input is set or there's no supply voltage
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