Circuit descripted in the book : "The Art of Electronics-by Paul Horowitz & Winfield Hill: Page 78
THE npn switch Q2 accepts the “logic-level” input of 0 V or +3 V derived from 15 volts Powers supply by a 2 Resistance divider, pulling its collector load to ground accordingly.
When Q2 is cut off, R3 holds Q3 off; when Q2 is saturated (by a +3 V input), R2 sinks base current from Q3 to bring it into saturation.
