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tecnomaster999
modified 11 years ago

AND logic gate

3
8
86
01:00:23
Use of the AND logic gate
published 11 years ago
Muzgi
11 years ago
I strongly believe its an OR gate..
Muzgi
11 years ago
And by the way you should use 0V for the logic 0 and 5V for logic 1
ETJAKEOC
11 years ago
I believe this is a NOT gate
lalo
11 years ago
This is a Not gate
Voltransistor
11 years ago
It's an NOR gate, because of the NOT gate, and the SPDT switch is a function of an OR gate. OR+NOT=NOR
Sine_eyed
11 years ago
Given that this circuit's configuration yields only two possible outcomes, with positive output rendered with an input voltage below Logical True, circuit thereby performs an inverting function which would make it NOT. Right?..
Muzgi
11 years ago
Ammm my bad haha it is a NOT gate :D
minOO7
11 years ago
NOT gate ====> 1V=low ; 3V=high .

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