modified 10 years ago

Asymetric flip-flop behaviour problem

01:47:30

I understand how the flip-flop works, but don't understand the exact waveforms of the voltages. 1) How is it possible that the pnp collector voltage gets negative? 2) Do you see how the same voltage first grows a little, then it stops and hesitates at that level, and only after some time it flips up? What is the hesitation caused by? I would expect the voltage going up till it reaches the npn saturation level, and then flipping stright up - without the stop in the middle.

published 10 years ago

Secuture

10 years ago

This negative voltage is an program overshoot. A very fast transient moment that happens when circuit enters instability phase. Many determining things happen in very short time especially if there is order for program to keep time frame up fast so we can enjoy watching as thing operates.

Secuture

10 years ago

If u slow down time quite much just before instability is triggered there will be no such errors cuz program will have more time to perform calculus

xarx

10 years ago

Thanks, I guessed it would be a problem of the simulation. However, even when I slow the simulation down to 1ms/s, the curve gets sometimes below zero. Not always, sometimes.

xarx

10 years ago

What about 2)? This should not be a simulation artefact as I tried to run the same in Qucs, and it gave me the same "hesitation".

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