This schematic is for a 3-AND-2-OR synchronous logic element from an original DTL series (128 series) developed in the USSR at the end of 1960s and produced till 1980s. It was based on a radiation-resilient planar epitaxial technology and was used in "Kosmos" series of USSR's satellites.
The 128 series used two power sources: a 4 V dc source and a 5 V pulse source that served as a common clock source for all synchronous logic. As you can see from the simulation, the circuit's output signal changes only at the moments dictated by the clock source. This is achieved by transforming the driver-amplifier part of the circuit (the part that is fed from the 4 V dc source) into a latch by introducing a positive feedback loop (find it!). The fully synchronous operation made the designs based on the 128 series especially reliable.
The resistor values are just my random guess, as I have no data for those. Based on the technical description of the 128 series, the transistors' operating points (defined by the resistors) were tuned in a way to eliminate the high current surges through the output stage (the "totem pole") when the state switches. Note that this was achieved before the TTL logic became a de-facto industry standard.
