Gated RS Latch

Operation ------------- 0. Turn the set-bit to 1 followed by 0. Turn the reset-bit to 1 followed by 0. This should bring the circuit to proper operation. 1. The purple signal represents the clock. 2. The green signal represents Q, a stored bit of 1 or 0. 3. The yellow signal represents ~Q, a reset flag and an indicator that the stored bit is 0. 4. The top-left logic source represents the set-bit. Toggling this element to the on position (while reset is 0) will store the value 1 in the circuit. 5. The bottom-left logic source represents the reset-bit. Toggling this element to the on position (while the set-bit is 0) will clear the stored bit and set it back to 0. 6. Turning both the set-bit and reset-bit on at the same time results in an unstable mode.