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cutiecats
modified 2 years ago

JK flip flop

4
1
286
04:45:05
affected by faling edge of clock. if j is on, k is off, q is on, not q is off. if k is on and j is off, q is off and not q is on. if both j and k are on, the circuit flips with the falling edge of clock.
published 2 years ago
592azy2circuitdude
2 years ago
That's correct. I always wondered why JK Flip-flops in EC activate on the falling edge of the clock while all the others are the normal/standard rising edge triggered type. And why are there circles on the JK inputs when they are not inverting inputs?...

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