NOT, AND, & OR GATES
Berikut simulasi untuk gerbang dasar
T=1=ON=NYALA
F=0=OFF=MATI
NOT:
in F(0) out T(1)
in T(1) out F(0)
AND
in F(0) F(0) out F(0)
in F(0) T(1) out F(0)
in T(1) F(0) out F(0)
in T(1) T(1) out T(1)
OR
in F(0) F(0) out F(0)
in F(0) T(1) out T(1)
in T(1) F(0) out T(1)
in T(1) T(1) out T(1)
MAH - ELEKTRO UDINUS
