Frequency Multiplier - PLL

267

03:01:00

Takes a moment to settle. This is an iteration of the PLL. At the frequency input is a D flip flip that acts as a divide by 2 circuit, and at the feedback is a divide by 6 circuit. This gives a multiplication ratio of 6/2, multiplying the input frequency by 3. Due to the low range of a 555 based VCO, this circuit is tuned to best lock on to 3 MHz

published 1 year ago

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