SR (latch):
> Q (next) = S + (!R•Q)
> S•R = 0
- Output latches to S(1) or R(0)
(whichever input was high last)
- If both 1, output is usually 1)
[ S R | Q (next) ]
0 0 | x
0 1 | 0
1 0 | 1
1 1 | n/a
D (latch):
> Q (next) = D
- Whatever D (input) is, Q (output)
will become that when clock rises
- Commonly used as a shift register
T (toggle):
> Q (next) = (T • !Q) + (!T • Q)
- Output changes states
with each rise in clock.
- Only toggles when T is high
- Cuts the frequency of clk in half
* doesnt seem to be working?*
JK (combo of T and SR):
> Q (next) = (J • !Q) + (!K • Q)
- J is "dominant" over K
- If J@K ( J , K are different)
then Qnext --> J
(like a SR flip flop, but with clock)
- If J • K
then Q toggles
(like T flip flop, but J • K)
- If !(J•K)
nothing...
[ J K | Q (next) ]
0 0 | x
0 1 | j
1 0 | j
1 1 | !Q
[ Q Q (next) | J K ]
0 0 | 0 X
0 1 | 1 X
1 0 | X 1
1 1 | X 0
