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hafiz09
modified 10 years ago

TTL realisation of inverter or NOT gate

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02:27:47
TTL IC's though are no longer used but musy say they were the rulers of their era because of fast switching ....but had much power dissipation...the capacitor is the equivalent capacitance of base-collector junctions of pnp and npn....it improves the logic levels and noise margin which directly increases the performance
published 11 years ago
mehedihasan
11 years ago
very nice
hurz
11 years ago
TTL had much power dissipation, right, but not that much as you demonstrante! The internal of an TTL is a little more complex and much more efficent then this circuit. Keep it up!
hafiz09
11 years ago
TTL had much dynamic power dissipation just because of high speed switching compared to MOS n CMOS families thats what i meant
hurz
11 years ago
But your demonstration does have extrem STATIC power dissipation.
aditya001
11 years ago
I like it very much . It helps to understand transistors.
hafiz09
11 years ago
@hurz it all static here ...coz there is no clock and hence no switching..itz just a realization of asynchronous or combinational logic NOT gate...you are mixing it up with fabrication
hafiz09
11 years ago
In RTL we had even much larger dissipation so we moved to TTL ..but coz of large power dissipation we moved to ECL which had approx same switching speed but comparatively less dissipation....in cmos we use insulated gates and channel conduction leading to very less power dissipation...n even today we are at CMOS technology
hurz
11 years ago
You missed something, 10Watt static power dissipation is far beyond reality. Check your circuit. Keep it up.
hafiz09
11 years ago
Sir,the ouput is a logic level not dissipation,dissipation parameters exist in real-time circuits not in simulators itz a realisation im still reapeating not transistor fabrication
mikey5869
11 years ago
Have to agree with hurz on this one, its due to the base current. Standby draw of 10 watts is not ideal.

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