modified 6 years ago

AND

01:14:15

Logic Gate With Transistors

published 6 years ago

sean140103

6 years ago

If you use a PNP as an output buffer by having its gate being pulled low by the two NPNs, then not only is it possible to eliminate the massive 8mA current through the resistor but also you would get an output voltage relative to the circuits ground. It would also be a larger voltage too.

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