CMOS NOT gate

145

01:24:58

A not gate implemented with CMOS logic.

As you can see the pull up network is made out of a single P-MOS, while the pull down network is made out of a single N-MOS.

These 2 transistors are logical complements of each other, that is to say that when one is on the other one is off.

Click the switch to see the output change accordingly as expected.

published 4 years ago

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