F=(ab+cd) where ab are the left inputs and cd are the inputs on the right. The trick to making one of these is to keep all the NMOS on the bottom, PMOS on top, and after you've modeled the NMOS circuit so it behaves the same as you'd think for the equation, create the PMOS version, but use a * instead of a + and a + instead of a * in the original equation. So, the PMOS circuit would be modeled like: (a+b)*(c+d)
Then, finish the output with an inverter and you have the exact circuit you want with no chance of signal/voltage degradation
