0 to 9 counter

285

06:15:19

Using an And Gate.
While in the past there has been problems with gate delays it does not appear to present a problem with this particular circuit. 

published 7 years ago

lenzrulz

7 years ago

Thank you for sharing Billy...👍🏻

selman

7 years ago

Slow your circuit you'll see that 10 actually appears...

BillyT

7 years ago

@selman, yes this is so, but it would appear to be working better than it used to.

hurz

7 years ago

@BillyT, i dont see this as a problem, i see this as a feature. In a real circuit it will also happen, you wont see it cuz its just for nano seconds but its there. So why do you want to hide an effect which is physicaly present? There are methodes to get rid of this, you know with an extra 4bit latch which is used to just store the lastest valid number on the falling edge. But this needs some more effort like a real design would need.

hurz

7 years ago

here a syncron design http://everycircuit.com/circuit/5238734824669184

wyoelk

7 years ago

Look at the circuit by exzitronic. How can there be a -1 total comments? Corcuit is titled. Вежливый свет в салон автомобиля

hurz

7 years ago

@wyoelk, one out of many, dont be afraid.

mb335

7 years ago

You could use a transistor instead of an AND gate to make the reset instantaneous. Just saying. It works on a similar display I made.

BillyT

7 years ago

Careful @mb335, that is where this conversation first started...

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