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Udit7395
modified 12 years ago

D flip flop

4
1
171
03:25:10
From top d clock d' Output FROM TOP Q AND Q(BAR)
published 12 years ago
YuHan
12 years ago
There's a simple test that give it a clock pulse and Q bar connected to D, then if Q output frequency is a half of CP, well congratulations. Else,it is not,maybe just a D-Latch/RS, or just some logic gates

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