Hey guys

There are 3 things that slow the circuit simulation clock, because of the way that the logic is being implemented they cannot be totally overcome, and these can momentarily show an A when rolling over from 9 to 0. Basically the delays are 1. Any frequency or clock cycle limits the time base that can be used. 2. The logic chips have a built-in adjustable propagation delay, and 3. The trace time base has to be adjusted to the highest level. The resetting of the counter is done by anding the 8 and the 2 and feeding them to reset and the next chips up count, see example, some people do better with the rollover delay. http://everycircuit.com/circuit/6204577935523840

You are a life saver. Thanks BillyT

Yeah, I see what you meant with the circuit, thanks again. I had no clue about the frequency, really need to learn more in that aspect. Im just a noob, I mean its just a hobbie so nothing too serious

Keep playing with it you can learn.

😎