WIP, learning about flip flops.
Pretty much a gated D-latch, where a timer (The Clock, or Clk) is the gate. I'm using a 555 timer.
The clock for D (the input) is out of sync (on purpose) with the clock for the gate. Notice what happens to the LEDs.... not quite a discernible rational pattern in their blinks.
Block Diogram O' Simplicity
Low or Falling Edge, meaning that output Q can only change when clock goes from 1 to 0.
When clock goes from 0 to 1,
Q = Whatever D happens to be right then.
D=input function (on it's own timer)
Q=top
Clk = 555 timer
______
D- | |-Q (LED output)
Clk-| D |
|_____|
