J K master slave flip flop

199

01:23:34

This circuit is master slave flip flop 
In this circuit, the clock pulse or square wave is open check for various combination of input,    output Q and Q' will not appear
And when the clock pulse is given , vary only K keeping J as 0
When K is 0 output is Q
When K is 1 output is Q
When K is now set to 0 the output is Q'
Now when K is made 1 the output is Q'
Thus using basic gates or using nand gates (  for 3 input nand gate I hav used a combinational logic or 2 and 2or and 3 not gates. )

published 10 years ago

Rakshith1996

10 years ago

If any changes plz dont forget to comment

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