It works based off the idea that x + y = x + (1 + 1 + 1 ... y times) and x - y = x - (1 + 1 + 1 ... y times)
USE:
The top counter will be both the accumulator and the first operand. The bottom one is the second operand. You set these using the bottom, opposite facing logic input on each one. Set using binary.
The logic train in the top right corner is the clock. It is activated by the bottom left logic input. The second to bottom logic input is the addition/subtraction flag (1 for subtraction).
When this is activated, it will decrement the bottom counter each clock cycle and increment/decrement the top counter until the bottom counter reaches 0.
The bottom set of logic gates are a rising edge detector.
The gates near the bottom counter check for 0.
The SR latch and AND gate are what controls whether it is active or not (R is pulsed when the circuit is done).
The gates do the selection of addition/subtraction.
The bottom counter is used as nothing but a latch for the output.
REVISION HISTORY:
Ver. 2: Added some displays so that you can see what's going on better and explained some things better.
