Small signal model of a properly biased cmos diff pair.
Sadly, I cannot simulate this.. Please see below for more details.
There is a bug in simulating the small signal behavior of CMOS differential pair. My small signal model is correct, I've verified with LTSpice. I've attached the LTSpice circuit here as well. But in everycircuit, it won't try to simulate.
If I change the polarity of one of the voltage dependent current source, it simulates but the result is very wrong (not surprising since the polarities of the current sources should be the same, see LTSpice file at https://www.dropbox.com/s/vnoadspwssn1e3n/opamp1_small_sig.asc?dl=0).
If you have any clue what might be wrong, please let me know. I find this tool very helpful and I'd really like to use it for all my circuit problems but it's a real bummer when it won't simulate complex circuits.
Thanks in advance!
