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juditdaniel
modified 6 years ago

Counter

3
10
167
02:28:28
This is a counter, when the first digit hit nine,the first counter is reseted and also increments the second counter. If both digits hit nine, both counters are reseted.
published 6 years ago
lenzrulz
6 years ago
Nice counters...πŸ‘
hurz
6 years ago
@juditdaniel, you mean if the counter hit "ten". Lenny, how nice is that?
lenzrulz
6 years ago
It’s very nice...πŸ‘
lenzrulz
6 years ago
Published any circuits lately?
kiani
6 years ago
Hyena lenzul hungry for spamming.
lenzrulz
6 years ago
You should know...πŸ˜‚
juditdaniel
6 years ago
Thanks.
wyoelk
6 years ago
Why the OR gate? Connecting the bottom AND gate to the reset accomplishes the same need, unless I'm missing something, which is a normal possibility.
juditdaniel
6 years ago
It does the same thing.
juditdaniel
6 years ago
I publish another project(merry christmast 2019)
wyoelk
6 years ago
That's what I mean. The OR gate is not needed in this configuration

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