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I changed a few things from my last design. I think it is a better and more straightforward digital voltmeter/analog to digital converter.
1) Better decade up/down counter system
By using CMOS and a resistor, the counters effectively work in decimal instead of binary with near instant number transitions (even from numbers 09 <-> 10).
2) Asynchronous to synchronized up/down/load.
Using a counter as a buffer, I can change the asynchronous counter inputs to sync with the clock. Now, all changes will occur on the rising edge of the clock, making the circuit much easier to understand.
3) Shift registers as pattern detection for stability.
To stabilize the least significant bit, I only update to 7-segment displays when the number changes by 2. Last design, I used a state machine. This time, I use one counter to act as two shift registers to detect the pattern (up up, or down down). When this happens, the signal to latch the output number goes high.
Blue waveform: Digital feedback
Green waveform: Unknown input voltage
Orange waveform: Latch output number
Old Design (for anyone interested):
https://everycircuit.com/circuit/4688147021299712
Prev Circuit:
https://everycircuit.com/circuit/4912436234420224
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