modified 5 years ago

Divider by 3 with 50-50 duty cycle

01:16:02

This is a synchronous frequency divider by 3 generating a meander output signal with 50% duty cycle when fed by a similar signal. To get symmetric positive and negative pulse widths at the output I use a trick with inverting the phase of the input clock at every second counted pulse. 

published 5 years ago

Robert_Kidd

5 years ago

Thank you for posting. Your circuits and descriptions are always interesting and appreciated.

stanislav_maslovski

5 years ago

Thanks, Robert!

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