2 Wire Data Packet Transfer - TX - RX - MK-3 - 555

Data transfer via 2 wires. // As earlier post, but now using a 555 timer. Adjusting the sim speed now has an effect. LH side is TX & RH side is RX. Set the bits for the TX to display a number. That number will then be displayed on the RX side. The sequencers on each side are synchronised via a shared clock pulse wire. The TX sequencer reads the bits set for the TX display (4 clock pulses), and sequentially transmits them to the RX. The RX sequencer then reads the bits and sends them to the 4 latches (top right) (had to use counters to create the latches). This creates a latched bit set. A fifth pulse then loads this bit set into the counter that feeds the RX display. A big thanks to roops1967 For the help with speeding things up.

published 10 years ago