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justinmcg67
modified 11 years ago

Pull Down w FET

7
2
201
06:06:10
Toggle the first switch to turn the Gate HIGH or LOW. Toggle the switch with the 10k pull-down resistor to enable or disable the pull down effect. When the 10k resistor is disabled and the Gate is toggled from HIGH to LOW the FET will still pass current. However if the Gate is toggled LOW *and* the pull-down is enabled, the Gate will be pulled LOW and turn the FET off, no longer passing current.
published 11 years ago
UncleRick
11 years ago
Your third statement is not actually true. The gate does not really go LOW. Due to the ultra-high impedance of the isolated gate, the charge is not bled off and the gate remains HIGH. Thus the 1st switch may have been flipped open, but the gate is still HIGH at 5 volts. Thus the FET continues to conduct. ;-)
justinmcg67
11 years ago
Oh cool i did not know that (obviously). Thanks for the correction.

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