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ericstanleysamar
modified 4 years ago

Shift Register for SPI

4
0
402
05:40:06
Here, an 8-bit data is transferred serially, and is only interpretted to the output after all of the 8-bits have been passed. The first bit transferred is the lock bit and must always be HIGH. When this bit arrives to the last flipflop, it causes the data to be reflected at the output (represented by 7-segment displays) and disables the clock signal. In the circuit, an output of "F1" is expected. Data: 1111 0001 ^ lockbit Experiment with the circuit by using other timing for data. Use the pushbutton below to restart the states of the latches/flipflops.
published 5 years ago

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