-> Q2 is normally held in saturation by R_3, so it's output is close to ground (R_3 was chosen small enough to ensure Q2's saturation
-> When circuit's input is at ground, Q1 us cut off, with its collector at 5V
-> The capacitor is therefore charged, with 5V on its left terminal and appx 0.6V on it's right terminal. Cap has about 4.4V across it
-> A positive 5V input step brings Q1 into saturation, forcing its collector to ground
-> because of the voltage across the capacitor, this brings the base of Q2 momentarily to negative
