Buffered one bit register with RW switches

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00:40:05

MUX, DFF, tri-state inverting buffer.

The DFF D input is connected to the output of the MUX. Clk is fed from an off-schematic source, the Q is fed back through the MUX when W=0, and -Q is connected to the tri-state, which allows the connection to a data bus.

published 8 years ago

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