modified 8 years ago

Emitter Coupled Logic Inverter

00:51:45

ECL is the fatest logic gate. It is because transistor is always turned on in the final stage. The trafe off for the speed is that it consumes more power. High logic level is set to -0.7v while low logic level is set to -1.5v or more negative than that. Enjoy!

published 8 years ago

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