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raffy611
modified 7 years ago

Three input or gate. Useing Cmos Technology

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00:47:07
CMOS: complementry metal-oxide-semiconductor. Uses pairs of n ch and p ch mosfets
published 7 years ago
hurz
7 years ago
In center its an NAND with double output INVERTER which lets logic unchanged, and the inputs are single inverted which makes overall very overengineered an OR gate by invert all inputs and outputs. There is a much more direct methode to build an OR gate
hurz
7 years ago
Check this and part substition forms https://en.m.wikipedia.org/wiki/De_Morgan%27s_laws
raffy611
7 years ago
the dounle Inversion on the output is there becouse the Output is ment to sink / sourese more current. And i am using De Morgen: Nand with Inverted Inputs = Or
hurz
7 years ago
Thats what i have said.

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