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bryanthehacker
modified 7 years ago

Simplest Class D Amplifier

30
16
974
1d 02:10:02
- High Power - Variable Gain - Voltage Feedback for a nice output signal - High Efficency -Transistor BD139 BD140 -Mosfet IRF540 IRF9540 -Ultra Fast Op Amp
published 9 years ago
thebugger
9 years ago
A very weird topology. I like it though. With an automatic error correction or something. Although I think there's a possibility for erratic behaviour. It doesn't only modulate the pulses width, but also their frequency at times. I don't know, but very nice. Me likey ;)
thebugger
9 years ago
I think it needs a pinch of hysteresis to limit thr maximum sampling frequency.
bryanthehacker
9 years ago
Yeah this circuit need more fixes , but it's f***ing crazy ahah !!
thebugger
9 years ago
Absofucking! Awesome circuit! Needs a pinch of hysteresis, but EC shows no solution when the hysteresis is low, it works when the hysteresis is super high, and that doesn't do us any good.
bryanthehacker
9 years ago
I add two .22 resistors to prevent high current peaks that can blow up the mosfets and two protection schottky diode.
2ctiby
9 years ago
50 v getting to the Mosfet gates..? are your z diodes wired correctly?...just wondering
bryanthehacker
9 years ago
Yes , measure the Vgs , it's 0 to 15v :)
bryanthehacker
9 years ago
Use a voltmeter between gate and source
2ctiby
9 years ago
Yes, I hadn't taken the min v of 35 from the max 50. Your output signal looks like a nice replica of the input too. Thanks.
thebugger
9 years ago
In my experience the output signal doesn't need to be super clean. Remember the speaker has inductance, and will clear out most harmonics itself. Moreover the speaker cannot reproduce signals with a higher frequency than 20Khz. So everything above it, gets mostly filtered. There are even some filterless class D amps, that use the speaker itself as th filtering component.
bryanthehacker
9 years ago
Mmm there is only a small bug... the gate voltage are not a perfect square wave , and in a small fraction of time all the two mosfet are actived , and i see a short circuit.
bryanthehacker
9 years ago
I will try this circuit on another simulator. And build it if works fine.
thebugger
9 years ago
Typically the MOS stage should be with one N-Channel MOS and one P-Channel MOS. This way you ensure that no matter what, one MOS will always be closed when the other is conducting.
hurz
9 years ago
"no matter what, one MOS will always be closed when the other is conducting" .... Buggzy, have you ever tried that in real? Or start first in simulation and see what will happend with your "no matter what...."
2ctiby
9 years ago
Just a little messing here ... http://everycircuit.com/circuit/5232141589282816
2ctiby
9 years ago
More messing around here.... http://everycircuit.com/circuit/5732389315149824

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