This circuit is an example of the power loss caused by shoot through current during the switching in a CMOS logic gate. There’s a brief region when the input switches between the HIGH and LOW states that results in both the P-ch & N-ch FETs conducting partially (saturation region), resulting in the current spike shown in green. This is the shoot through current: one of the main reasons that digital circuits require fast transitions to work efficiently. (The load was selected to represent a high impedance, eg. another logic gate’s input, so there wouldn’t be any meaningful current draw from it to distort the shoot through current.)
