Sense amplifiers are used to sense the information stored in the memory cell during the read operation.
Description of circuit:
The top orange line is word line, which is used to activate the two access transistors. It is applied to gate of two access transistors. A logic source is given to set or reset the word line.
The left most (blue) and right most (green) vertical lines are data and data-bar lines respectively.
Pair of a nmos and pmos transistors in top middle are two cross coupled inverters. These two cross coupled inverters form a memory cell. A logic source along with a not gate is provided to input data into the memory cell. The not gate ensures the data is stored properly.
Another nmos is connected to the source of the above two nmos, whose source is connected to ground. It is provided with a enable input at the gate. The logic source provides the enable input.
The three transistors at the bottom are the out precharge and equalization circuit. Another enable bit is provided to gate of every mos, which makes the data and data-bar lines to voltage Vdd/2 = 2.5V
Working :
Initially use the second logic source to store bit in the memory cell.
Then enable the bottom most logic source to force data and data-bar lines to Vdd/2
Simultaneously enable first logic source and disable last logic source. This will enable the word line an transfer the value stored in memory cell to the data and data-bar lines. The value stored using second logic source appears at data line (blue line)
Now enable the third logic source to enable the sense amplifier.
Done 👍🏻
