Clock to D-Latch 1 Bit Memory

No IC's Challenge Clock ~3.65mA RMS Display ~6.24mA Memory Hold ~46.7uA Only NO SW ~7.66mA RMS Display Clock and Memory ~9.19mA RMS All ~9.82mA RMS 19 NPN 3 Super Capacitors 6 diode 3 led 5mA 2 x 100nF-1uF Cap 3 Latch Switch 2 NO Switch 3 x 100 2 x 400 4 x 50k 2 x100k 18 x 200k 1 x 300k total 30 resistors SW Map 1(NO) 2 3 4 SW Top Left - Pulse the Clock (if needed) SW 1(NO) - Displays Clock & Memory, Enables memory change SW 2 - Save Memory SW 3 - Show/Enable Clock SW 4 - Display Memory features: 1. memory has 1mF backup-power 2. memory has constant power memory hold SW 3. output and clock LEDs fade out 3. Separate Hold SW for Clock Display and Output Display

published 9 months ago